News
How OCP S. O. L. I. D. Completes The Data Center Security Picture
1+ hour, 41+ min ago (530+ words) A framework that establishes concrete device-specific security requirements upfront and verifies them at the end. That gap closed in January 2026 with OCP S. O. L. I. D. (Securing Of Latest Infrastructure Devices) v1. 0. S. O. L. I. D. provides concrete device-specific security requirements that you can target from day one. Together,…...
The Unavoidable CMMC Deadline
1+ day, 1+ hour ago (263+ words) 75% don't prioritize CMMC " but 100% will need it by November 2028. The post The Unavoidable CMMC Deadline appeared first on Semiconductor Engineering. The U. S. Department of Defense's (Do D) Cybersecurity Maturity Model Certification (CMMC) rollout is no longer a future concern. It is rapidly becoming…...
Securing AI at the Silicon Level: Solutions for a Smarter, Safer Future
1+ day, 1+ hour ago (135+ words) Embedding hardware'rooted protection into AI So Cs and chiplets to secure their data and models. The post Securing AI at the Silicon Level: Solutions for a Smarter, Safer Future appeared first on Semiconductor Engineering. This white paper explains how Synopsys…...
Emulation-based So C Security Verification (U. of Florida)
2+ week, 5+ day ago (646+ words) A new technical paper, "Emulation-based System-on-Chip Security Verification: Challenges and Opportunities," was published by researchers at University of Florida. Abstract "Increasing system-on-chip (So C) heterogeneity, deep hardware/software integration, and the proliferation of third-party intellectual property (IP) have brought security validation…...
From Monolithic So Cs To Chiplets: A New Hardware Security Paradigm
3+ mon, 2+ day ago (476+ words) Compromising a single weak chiplet or the interconnect can be sufficient to threaten the entire device platform. With chiplets, the device is no longer monolithic but a distributed, frequently multi'vendor die design. Trust must extend across multiple dies, across die-to-die…...
Security Threats Converge On Io T, Industrial ICs, Physical AI
3+ mon, 4+ week ago (945+ words) Edge devices across multiple applications share common attack vectors. Security functionality must be designed in from the start and be updatable. Devices in a broad range of edge AI applications are increasingly at risk of hacking or tampering, with the…...
Assuring Comprehensive Security Coverage In Hardware Design
1+ week, 1+ day ago (109+ words) Security coverage is a key component of a systematic framework for comprehensive, traceable security verification. The post Assuring Comprehensive Security Coverage In Hardware Design appeared first on Semiconductor Engineering. Is your hardware design prepared to withstand today's complex threat landscape?...
How Long Will CAN Stick Around As Rival Networks Speed Up?
1+ week, 1+ day ago (1025+ words) New in-vehicle networking technology will likely take over as more AI is added, but in the near term designers face challenges integrating new with old. As the "AI everywhere" mantra extends to vehicles, there is increasing pressure on in-vehicle networks…...
Glass Substrates Gain Momentum
7+ mon, 2+ week ago (975+ words) Benefits increase with package size, but not all the kinks have been worked out. As a package substrate, the benefits of glass are substantial. It's extremely flat with lower thermal expansion than organic substrates, which simplifies lithography. And that's just…...
Rowhammer Attack On NVIDIA GPUs With GDDR6 DRAM (University of Toronto)
9+ mon, 3+ week ago (149+ words) A new technical paper titled "GPUHammer: Rowhammer Attacks on GPU Memories are Practical" was published by researchers at University of Toronto. Abstract: "Rowhammer is a read disturbance vulnerability in modern DRAM that causes bit-flips, compromising security and reliability. While extensively…...